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  PA08 ? PA08a PA08u 1 PA08, PA08a features ? wide supply range 15v to 150v ? programmable output current limit ? high output current up to 150ma ? low bias current fet input applications ? high voltage instrumentation ? electrostatic transducers & deflection ? programmable power supplies up to 290v ? analog simulators description the PA08 is a high voltage operational amplifer designed for output voltage swings of up to 145v with a dual () sup - ply or 290v with a single supply. high accuracy is achieved with a cascode input circuit confguration. all internal biasing is referenced to a zener diode fed by a fet constant current source. as a result, the PA08 features an unprecedented sup - ply range and excellent supply rejection. the output stage is biased-on for linear operation. internal phase compensation assures stability at all gain settings. the safe operating area (soa) can be observed with all types of loads by choosing the appropriate current limiting resistors. for operation into inductive loads, two external fyback pulse protection diodes are recommended. a heatsink may be necessary to maintain the proper case temperature under normal operating conditions. this hybrid integrated circuit utilizes beryllia (beo) substrate, thick flm resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. ultrasonically bonded aluminum wires provide reliable inter - connections at all operating temperatures. the 8-pin to-3 package is hermetically sealed and electrically isolated. the use of compressible thermal isolation washers and/or improper mounting torque will void the product warranty. please see general operating considerations. equivalent schematic typical application ate pin driver the PA08 as a pin driver is capable of supplying high test voltages to a device under test (dut). due to the possibility of short circuits to any terminal of the dut, current limit must be set to be safe when limiting with a supply to output volt - age differential equal to the amplifer supply plus the largest magnitude voltage applied to any other pin of the dut. in addition, fyback diodes are recommended when the output of the amplifer exits any equipment enclosure to prevent damage due to electrostatic discharges. refer to application note 7 for details on accuracy considerations of this circuit. external connections cl+ +v +in Cin Cv bal clC out s s top view r cl+ r clC output 1 2 3 4 5 6 7 8 r s r t note: input offset voltage trim optional. r t = 10k max r s = ( +v s + -v s ) r t /1.6 PA08 -132v +132v 110k +v s -v s +132v -132v 8.2 8.2 1ma d.u.t. dac 3 5 6 2 7 8 d1 q1 q3 q5 q2 d2 c4 q12a q12b 4 q15 q4 c3 q11 q16 q6 c1 q7 q19 q17 1 q10 q9 c2 q8 8-pin to-3 package style ce power operational amplifier PA08 ? PA08a p r o d u c t i n n o v a t i o n f r o m copyright ? cirrus logic, inc. 2009 (all rights reserved) http://www.cirrus.com may 2009 apex ? PA08urevm p r o d u c t i n n o v a t i o n f r o m
      % 2 2 2 2 % $ 2" 2#  2 2
PA08 ? PA08a PA08u 3 0 25 50 75 100 125 temperature, t (c) 0 5 10 power derating internal power dissipation, p d (w) -55 0 100 0 200 250 100 10 100 10k .1m frequency, f (hz) input noise voltage, v n (nv/hz) 1 100 10m frequency, f (hz) -20 0 60 120 small signal response open loop gain, a ol (db) 20 40 80 100 0 100 .1m 10m C210 C150 C60 0 phase response C90 C30 50k .1m .3m .7m frequency, f (hz) 15 output voltage, v o (v p-p ) 1 100 1k 1m frequency, f (hz) 0 100 140 common mode rejection common mode rejection cmr (db) 20 60 120 1 1m frequency, f (hz) 0 40 140 power supply rejection power supply rejection, psr (db) 60 120 10k 50k .2m frequency, f (hz) 30 300 common mode voltage common mode voltage, v cm (v p-p ) 60 200 1.5 C6 C2 2 6 2.0 0 .5 30 pulse response normalized slew rate (x) 50 250 total supply voltage, v s (v) 4 current limit current limit, i lim (ma) 2 10 10k .1m 20k 1m 15 input noise 1k 2 4 1k -25 25 50 75 150 2.5 15 power response .2m 10 100 1k 10k .1m 20 30 .4 10 1k 10k .1m 1m 150 7.5 12.5 10 10k 1m frequency, f (hz) phase, () relative open loop gain, a (db) 0 1 2.5 C4 0 4 50 100 150 200 250 300 .6 .8 1.0 1.2 1.4 1.6 .5m 30 60 100 200 300 40 .5m 100 125 50 300 6 case temperature, t c (c) C180 C120 6 10 15 20 100 open loop gain slew rate C2 C4 C6 100 150 200 t c = -25c t c = 85c t c = -25c r cl = 4.7 r cl = 10 r l =1.2k r l =1.2k r l =1.2k 1m output voltage, v o (v) v in = 5v, t r = 100ns time, t (s) r l =1.2k total supply voltage, v s (v) 80 80 .1m |+v s | + |Cv s | = 300v |+v s | + |Cv s | = 100v |+v s | + |Cv s | = 100v |+v s | + |Cv s | = 300v +v s Cv s 20 17.5 p r o d u c t i n n o v a t i o n f r o m
PA08 ? PA08a 4 PA08u general please read application note 1 "general operating consider - ations" which covers stability, supplies, heat sinking, mounting, current limit, soa interpretation, and specifcation interpretation. visit www.cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, cur - rent limit and heat sink selection. the "application notes" and "technical seminar" sections contain a wealth of information on specifc types of applications. package outlines, heat sinks, mounting hardware and other accessories are located in the "packages and accessories" section. evaluation kits are avail - able for most apex precision power product models, consult the "evaluation kit" section for details. for the most current version of all apex precision power product data sheets, visit www.cirrus.com. safe operating area (soa) the output stage of most power amplifers has two distinct limitations: 1. the current handling capability of the transistor geometry and the wire bonds. 2. the second breakdown effect which occurs whenever the simultaneous collector current and collector-emitter voltage exceeds specifed limits. the soa curves combine the effect of these limits. for a given application, the direction and magnitude of the output current should be calculated or measured and checked against the soa curves. this is simple for resistive loads but more complex for reactive and emf generating loads. however, the following guidelines may save extensive analytical efforts. 1. under transient conditions, the following capacitive and inductive loads are safe with the current limits set to the maximum: v s c(max) l(max) 150v .4f 280mh 125v .9f 380mh 100v 2f 500mh 75v 10f 1200mh 50v 100f 13h 2. the amplifer can handle any emf generating or reactive load and short circuits to the supply rails or simple shorts to common if the current limits are set as follows: 200 150 100 80 50 40 30 20 80 100 120 150 170 200 250 300 supply to output differential voltage (v) output current from +v s or Cv s (ma) steady state t = 5ms t = 1ms t = 0.5ms t = 200s short to v sc, short to v s c, l, or emf load common 150v 20ma 67ma 125v 27ma 90ma 100v 42ma 130ma 75v 67ma 200ma 50v 130ma 200ma these simplifed limits may be exceeded with further analysis using the operating conditions for a specifc application. 3. the output stage is protected against transient fyback. however, for protection against sustained, high energy fyback, external fast-recovery diodes should be used. inductive loads two external diodes as shown in figure 1, are required to protect these amplifers from fyback (kickback) pulses exceeding the supply voltages of the amplifer when driving inductive loads. for component selection, these external diodes must be very quick, such as ultra fast recovery diodes with no more than 200 nanoseconds of reverse recovery time. the diode will turn on to divert the fyback energy into the supply rails thus protecting the output transistors from destruction due to reverse bias. a note of caution about the supply. the energy of the fyback pulse must be absorbed by the power supply. as a result, a tran - sient will be superimposed on the supply voltage, the magnitude of the transient being a function of its transient impedance and current sinking capability. if the supply voltage plus transient exceeds the maximum supply rating or if the ac impedance of the supply is unknown, it is best to clamp the output and the supply with a zener diode to absorb the transient. input protection the input is protected against common mode voltages up to the supply rails and differential voltages up to 50v. increased protection against differential input voltages can be obtained by adding 2 resistors, 2 capacitors and 4 diode connected fets as shown in figure 2. current limiting proper operation requires the use of two current limit resis - tors, connected as shown in the external connection diagram. the minimum value for r cl is 3.24. however, for optimum reliability it should be set as high as possible. refer to the general operating considerations section of the handbook for current limit adjust details. protection, inductive load protection, overvoltage in4936 or ues1106 +v s Cv s 100pf/200v 100pf/200v 150k 150k +in Cin fig. 1 fig. 2 + _ q1 q2 q3 q4 p r o d u c t i n n o v a t i o n f r o m
PA08 ? PA08a PA08u 5 cont acting cirrus logic support for all apex precision power product questions and inquiries, call toll free 800-546-2739 in north america. for inquiries via email, please contact apex.support@cirrus.com. international customers can also request support by contacting their local cirrus logic sales representative. to fnd the one nearest to you, go to www.cirrus.com important notice cirrus logic, inc. and its subsidiaries ("cirrus") believe that the information contained in this document is accurate and reliable. however, the information is subject to change without notice and is provided "as is" without warranty of any kind (express or implied). customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnifcation, and limitation of liability. no responsibility is assumed by cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. this document is the property of cirrus and by furnishing this information, cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. cirrus owns the copyrights associated with the information contained herein and gives con - sent for copies to be made of the information only for use within your organization with respect to cirrus integrated circuits or other products of cirrus. this consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe prop - erty or environmental damage (critical applications). cirrus products are not designed, authorized or warranted to be suitable for use in products surgically implanted into the body, automotive safety or security devices, life support prod - ucts or other critical applications. inclusion of cirrus products in such applications is understood to be fully at the cus - tomers risk and cirrus disclaims and makes no warranty, express, statutory or implied, including the implied warranties of merchantability and fitness for particular purpose, with regard to any cirrus product that is used in such a manner. if the customer or customers customer uses or permits the use of cirrus products in critical applications, customer agrees, by such use, to fully indemnify cirrus, its officers, directors, employees, distributors and other agents from any and all liability, including attorneys fees and costs, that may result from or arise in connection with these uses. cirrus logic, cirrus, and the cirrus logic logo designs, apex precision power, apex and the apex precision power logo designs are trademarks of cirrus logic, inc. all other brand and product names in this document may be trademarks or service marks of their respective owners. p r o d u c t i n n o v a t i o n f r o m


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